Ian Buckley

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  • Registered on: 08/26/2010

Projects

  • fpga (Developer, 08/26/2010)
  • uhd (Developer, 08/26/2010)

Activity

Reported issues: 0

11/11/2010

08:08 pm uhd Revision c8156913: hangedddddddextrnal fifo size to use full NoBL SRAM
08:08 pm fpga Revision c8156913: hangedddddddextrnal fifo size to use full NoBL SRAM
08:06 pm fpga Revision b4d3dba5: Corrected extfifo code so that all registers that are on SRAM signals are pack...
Explcit drives and skews added to GPIO pins
Corrected minor error in FIFO logic that showed data avail internally in...
08:06 pm uhd Revision b4d3dba5: Corrected extfifo code so that all registers that are on SRAM signals are pack...
Explcit drives and skews added to GPIO pins
Corrected minor error in FIFO logic that showed data avail internally in...

08/26/2010

01:54 am uhd Revision 596fc8d8: hangedddddddextrnal fifo size to use full NoBL SRAM

08/25/2010

11:32 pm uhd Revision 8cd377d7: Corrected extfifo code so that all registers that are on SRAM signals are pack...
Explcit drives and skews added to GPIO pins
Corrected minor error in FIFO logic that showed data avail internally in...

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