Revision fa7d4a2a host/lib/usrp/usrp2/mboard_impl.cpp

b/host/lib/usrp/usrp2/mboard_impl.cpp
38 38
    size_t index,
39 39
    transport::udp_simple::sptr ctrl_transport,
40 40
    transport::zero_copy_if::sptr data_transport,
41
    size_t recv_samps_per_packet,
42
    const device_addr_t &flow_control_hints
41
    const device_addr_t &device_args,
42
    size_t recv_samps_per_packet
43 43
):
44 44
    _index(index),
45 45
    _iface(usrp2_iface::make(ctrl_transport))
......
58 58
    //contruct the interfaces to mboard perifs
59 59
    _clock_ctrl = usrp2_clock_ctrl::make(_iface);
60 60
    _codec_ctrl = usrp2_codec_ctrl::make(_iface);
61
    _serdes_ctrl = usrp2_serdes_ctrl::make(_iface);
62 61
    //_gps_ctrl = usrp2_gps_ctrl::make(_iface);
63 62

  
64 63
    //if(_gps_ctrl->gps_detected()) std::cout << "GPS time: " << _gps_ctrl->get_time() << std::endl;
......
98 97
    _iface->poke32(_iface->regs.tx_ctrl_policy, U2_FLAG_TX_CTRL_POLICY_NEXT_PACKET);
99 98

  
100 99
    //setting the cycles per update (disabled by default)
101
    const double ups_per_sec = flow_control_hints.cast<double>("ups_per_sec", 0.0);
100
    const double ups_per_sec = device_args.cast<double>("ups_per_sec", 0.0);
102 101
    if (ups_per_sec > 0.0){
103 102
        const size_t cycles_per_up = size_t(_clock_ctrl->get_master_clock_rate()/ups_per_sec);
104 103
        _iface->poke32(_iface->regs.tx_ctrl_cycles_per_up, U2_FLAG_TX_CTRL_UP_ENB | cycles_per_up);
105 104
    }
106 105

  
107 106
    //setting the packets per update (enabled by default)
108
    const double ups_per_fifo = flow_control_hints.cast<double>("ups_per_fifo", 8.0);
107
    const double ups_per_fifo = device_args.cast<double>("ups_per_fifo", 8.0);
109 108
    if (ups_per_fifo > 0.0){
110 109
        const size_t packets_per_up = size_t(usrp2_impl::sram_bytes/ups_per_fifo/data_transport->get_send_frame_size());
111 110
        _iface->poke32(_iface->regs.tx_ctrl_packets_per_up, U2_FLAG_TX_CTRL_UP_ENB | packets_per_up);
......
155 154
    //translate pps source enums
156 155
    switch(_clock_config.pps_source){
157 156
    case clock_config_t::PPS_SMA:  pps_flags |= U2_FLAG_TIME64_PPS_SMA;  break;
158
    case clock_config_t::PPS_MIMO: pps_flags |= U2_FLAG_TIME64_PPS_MIMO; break;
159 157
    default: throw std::runtime_error("unhandled clock configuration pps source");
160 158
    }
161 159

  
......
176 174
        switch(_clock_config.ref_source){
177 175
        case clock_config_t::REF_INT : _iface->poke32(_iface->regs.misc_ctrl_clock, 0x12); break;
178 176
        case clock_config_t::REF_SMA : _iface->poke32(_iface->regs.misc_ctrl_clock, 0x1C); break;
179
        case clock_config_t::REF_MIMO: _iface->poke32(_iface->regs.misc_ctrl_clock, 0x15); break;
180 177
        default: throw std::runtime_error("unhandled clock configuration reference source");
181 178
        }
182 179
        _clock_ctrl->enable_external_ref(true); //USRP2P has an internal 10MHz TCXO
......
187 184
        switch(_clock_config.ref_source){
188 185
        case clock_config_t::REF_INT : _iface->poke32(_iface->regs.misc_ctrl_clock, 0x10); break;
189 186
        case clock_config_t::REF_SMA : _iface->poke32(_iface->regs.misc_ctrl_clock, 0x1C); break;
190
        case clock_config_t::REF_MIMO: _iface->poke32(_iface->regs.misc_ctrl_clock, 0x15); break;
191 187
        default: throw std::runtime_error("unhandled clock configuration reference source");
192 188
        }
193 189
        _clock_ctrl->enable_external_ref(_clock_config.ref_source != clock_config_t::REF_INT);

Also available in: Unified diff